Faculty Name : Vijay Mahantesh
Department : Dept. of Telecommunication Engineering

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Assistant Professor (Industry Adjunct)
Dept. of Telecommunication Engineering
GSSSIETW Mysuru

 

 

Educational Details :
  • Currently pursuing PhD from VTU, Belagavi, in Image Cryptography
  • M.S in VLSI - CAD from MAHE University, Manipal – 2003 to 2005, passed with First Class
  • B.E in IT from PDA College of Engineering, Gulbarga, affiliated to VTU, Belgaum, from 1998 – 2002 , passed with First Class
Personal Details :
  • Date of Birth - 09 Nov, 1980
  • Languages known - English, Hindi and Kannada
Professional Experience :
  • Currently working as a Managing Director at Cleverbit Solutions Pvt. Ltd, Bangalore
  • Worked as an Assistant Professor in “ACS College of Engineering”, Bangalore From Aug-2011 to Dec 2016
  • Worked as Lecturer at “JSSATE”, Mauritius from July 2010 to July 2011
  • Worked as Lecturer at “Global Academy of Technology”, Bangalore from July 2009 to July 2010
  • Around 5 years of Industrial Experience
Skill Set :
  • 12+ years of professional experience, which includes 7+ years of teaching and around 5 years industrial experience
  • Proficient in C and Embedded C programming
  • Working Knowledge of microcontrollers 8051 and ARM
  • Familiarity with ASIC design flow, EDA tools and methodologies used therein
  • Good in VerilogHDL and familiar with VHDL
  • Verification Frameworks: VMM
  • Scripting languages: Shell and Tcl/Tk
  • Working Knowledge of EDA tools : NCSIM, VCS, Questasim, Xilinx ISE, Formality
  • Good in Digital Design Concepts
Project Details :
  • Design and Verification of IEEE 754 standard floating point arithmetic, Area of work - Designing and Functional Verification, Tools - NCSim  Description – A floating point arithmetic unit is designed and verified with addition, Subtraction, multiplication and division operations. An IEEE 754 format is a "set of representations of numerical values and symbols". A format may also include how the set is encoded.
  • Design of High speed low power Error Tolerant Adder, Area of work - Designing and Functional Verification, Tools – NCSim and Xilinx ISE,  Description – Error Tolerant Adder is an innovative and novel addition arithmetic that can attain great saving in speed and power consumption by sacrificing some accuracy.
  • NOC Design and Verification using System Verilog, Area of work - Designing and Functional Verification, Tools - VCS and QuestaSim, Description - NOC is a design unit which can be used to interconnect different devices like DSP, MMU, and MCU etc. NOC has nine routing points which can be further extended. Each of these routing points has five ports, out of which one is used to connect the device. NOC has its own communication protocol, it uses X, Y routing in which priority is given to the X direction.
  • Development of VMM Verification environment for I2C Protocol, Area of work - Functional Verification, Tools - VCS and DVE, Description - I2C is a two wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable for applications requiring occasional communication over a short distance between many devices. Objective of the project is to create a VMM environment for the I2C.
  • Conversion of RVM to VMM environment, Area of work - Functional Verification Tools- VCS and DVE, Description- Translation of existing RVM environment to VMM environment, keeping the Test bench unaltered. The conversion is carried successfully on various modules.
Contact Details :

Department of Telecommunication Engineering
GSSS Institute Of Engineering & Technology For Women
E-mail Id : This email address is being protected from spambots. You need JavaScript enabled to view it.
Phone : 0821-4257304/05/06 (Extn 301)

My Vision:

Pursue a challenging and exciting career in an industry, thereby acquiring knowledge and experience to work towards organizational and personal growth.

 

 

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